Datasheet

197
7593L–AVR–09/12
AT90USB64/128
• Bit 3 – USBSn: Stop Bit select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
• Bit 2:1 – UCSZn1:0: Character size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
• Bit 0 – UCPOLn: Clock polarity
This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode is
used. The UCPOLn bit sets the relationship between data output change and data input sample,
and the synchronous clock (XCKn).
19.9.5 UBRRLn and UBRRHn – USART baud rate registers
Table 19-6. USBS bit settings.
USBSn Stop bit(s)
01-bit
12-bit
Table 19-7. UCSZn bits settings.
UCSZn2 UCSZn1 UCSZn0 Character size
0 0 0 5-bit
0 0 1 6-bit
0 1 0 7-bit
0 1 1 8-bit
100Reserved
101Reserved
110Reserved
1 1 1 9-bit
Table 19-8. UCPOLn bit settings.
UCPOLn
Transmitted data changed
(output of TxDn pin)
Received data sampled
(input on RxDn pin)
0 Rising XCKn edge Falling XCKn edge
1 Falling XCKn edge Rising XCKn edge
Bit 1514131211109 8
– – – – UBRR[11:8] UBRRHn
UBRR[7:0] UBRRLn
76543210
Read/writeRRRRR/WR/WR/WR/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value00000000
00000000