Datasheet

iii
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
14.8 8-bit Timer/Counter Register Description 97
15 16-bit Timer/Counter1 with PWM 104
15.1 Overview 104
15.2 Accessing 16-bit Registers 106
15.3 Timer/Counter Clock Sources 109
15.4 Counter Unit 110
15.5 Input Capture Unit 111
15.6 Output Compare Units 112
15.7 Compare Match Output Unit 114
15.8 Modes of Operation 115
15.9 Timer/Counter Timing Diagrams 123
15.10 16-bit Timer/Counter Register Description 124
16 Power Stage Controller – (PSC0, PSC1 & PSC2) 131
16.1 Features 131
16.2 Overview 131
16.3 PSC Description 132
16.4 Signal Description 134
16.5 Functional Description 136
16.6 Update of Values 141
16.7 Enhanced Resolution 141
16.8 PSC Inputs 145
16.9 PSC Input Mode 1: Stop signal, Jump to Opposite Dead-Time and Wait 150
16.10 PSC Input Mode 2: Stop signal, Execute Opposite Dead-Time and Wait 151
16.11 PSC Input Mode 3: Stop signal, Execute Opposite while Fault active 152
16.12 PSC Input Mode 4: Deactivate outputs without changing timing. 152
16.13 PSC Input Mode 5: Stop signal and Insert Dead-Time 153
16.14 PSC Input Mode 6: Stop signal, Jump to Opposite Dead-Time and Wait. 154
16.15 PSC Input Mode 7: Halt PSC and Wait for Software Action 154
16.16 PSC Input Mode 8: Edge Retrigger PSC 154
16.17 PSC Input Mode 9: Fixed Frequency Edge Retrigger PSC 155
16.18 PSC Input Mode 14: Fixed Frequency Edge Retrigger PSC and Disactivate Out-
put 156
16.19 PSC2 Outputs 159
16.20 Analog Synchronization 159
16.21 Interrupt Handling 160
16.22 PSC Synchronization 160