Datasheet
33.10 Changes from 4317J to 4317K
1. Applied the Atmel new brand template that includes new logo and new addresses.
2. Updated the Figure 3-1 on page 3. Pin 18 changed to AGND instead of GND.
3. Updated the Figure 3-2 on page 3. Pin 24 changed to AGND instead of GND.
4. Added note to the MLF/QFN package: The Center GND PADDLE has to be connected to GND.
5. Updated Figure 7-3 on page 32.
6. Updated Table 9-1 on page 47. Added V
POR
and V
CCRR
characteristics.
7. Updated “MCU Control Register – MCUCR” on page 69. Added link for Bit 4:
“Configuring the Pin” on page 63.
8. Corrected “typos” in “Overview” on page 131.
9. Updated “Features” on page 131. Correct feature is: Abnormality protection function, emergency input to force
all outputs to low level.
10. Updated “Center Aligned Mode” on page 139. The label PSCn00 and PSCn01 are incorrect and are respectively
replaced by PSCn0 and PSCn1.
11. Updated the formula of “The waveform frequency is defined by the following equation” in “Normal Mode”
on page 144.
12. Updated the formula of f
AVERAGE
in “Enhanced Mode” on page 144.
13. Updated “Input Mode Operation” on page 149. Added a link to the Table 16-6 on page 149.
14. Updated “PSC Synchronization” on page 160. The correct content: If the PSCn has its PARUNn bit set, then it can
start at the same time as PSCn-1.
15. Updated “PSC 1 Control Register – PCTL1” on page 167. Bit 4 and Bit 3 linked to “PSC Input Configuration” on
page 148.
16. Updated content description of Bit 1 and Bit 3 in “PSC 2 Synchro and Output Configuration – PSOC2” on page 163.
17. Updated “Output Compare SA Register – OCRnSAH and OCRnSAL” on page 164 and “Output Compare RB
Register – OCRnRBH and OCRnRBL” on page 165. The registers are R/W and not only W.
18. Updated “Analog Comparator” on page 227, “Analog Comparator Block Diagram(1)(2)” .
19. Updated “PSC Output Behaviour During Reset” on page 282. If PSCRV fuse equals 0 (programmed), the selected
PSC outputs will be forced to high state. If PSCRV fuse equals 1 (unprogrammed), the selected PSC outputs will be
forced to low state.
20. Updated “Electrical Characteristics(1)” on page 300. Added “DAC Characteristics” on page 308.
21. Updated Table 26-5 on page 307. Replaced V
INT
parameter by A
REF
. Min and Max values updated.
22. Updated Table 26-2 on page 303. Removed two columns with 1.8 - 5.5V.