Datasheet

185
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
18. USART
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a
highly flexible serial communication device. The main features are:
18.1 Features
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
USART Extended mode (EUSART) with:
Independent bit number configuration for transmit and receive
Supports Serial Frames with 5, 6, 7, 8, 9 or 13, 14, 15, 16, 17 Data Bits and 1 or 2 Stop Bits
Biphase Manchester encode/decoder (for DALI Communications)
Manchester framing error detection
Bit ordering configuration (MSB or LSB first)
Sleep mode exit under reception of EUSART frame
18.2 Overview
A simplified block diagram of the USART Transmitter is shown in Figure 18-1. CPU accessible
I/O Registers and I/O pins are shown in bold.