Datasheet

164
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
• Bit 3 – POEN2D : PSCOUT23 Output Enable (PSC2 only)
When this bit is clear, second I/O pin affected to PSCOUT23 acts as a standard port.
When this bit is set, I/O pin related to PSCOUT23 is connected to PSC2 waveform generator A
or B output (according to POS23 setting) and is set and cleared according to PSC2 operation.
• Bit 2 – POENnB: PSC n OUT Part B Output Enable
When this bit is clear, I/O pin affected to PSCOUTn1 acts as a standard port.
When this bit is set, I/O pin affected to PSCOUTn1 is connected to the PSC waveform generator
B output and is set and clear according to the PSC operation.
• Bit 1 – POEN2C: PSCOUT22 Output Enable (PSC2 only)
When this bit is clear, second I/O pin affected to PSCOUT22 acts as a standard port.
When this bit is set, I/O pin related to PSCOUT22 is connected to PSC2 waveform generator A
or B output (according to POS22 setting) and it is set and cleared according to PSC2 operation.
• Bit 0 – POENnA: PSC n OUT Part A Output Enable
When this bit is clear, I/O pin affected to PSCOUTn0 acts as a standard port.
When this bit is set, I/O pin affected to PSCOUTn0 is connected to the PSC waveform generator
A output and is set and clear according to the PSC operation.
16.25.4 Output Compare SA Register – OCRnSAH and OCRnSAL
16.25.5 Output Compare RA Register – OCRnRAH and OCRnRAL
Table 16-12. Synchronization Source Description in Centered Mode
PSYNCn1 PSYNCn0 Description
00
Send signal on match with OCRnRA (during counting down of PSC). The
min value of OCRnRA must be 1.
01
Send signal on match with OCRnRA (during counting up of PSC). The
min value of OCRnRA must be 1.
1 0 no synchronization signal
1 1 no synchronization signal
Bit 76543210
–––– OCRnSA[11:8] OCRnSAH
OCRnSA[7:0] OCRnSAL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 00000000
Bit 76543210
–––– OCRnRA[11:8] OCRnRAH
OCRnRA[7:0] OCRnRAL
Read/Write WWWWWWWW
Initial Value 00000000