Datasheet

134
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
16.4 Signal Description
Figure 16-3. PSC External Block View
Note: 1. available only for PSC2
2. n = 0, 1 or 2
16.4.1 Input Description
Table 16-1. Internal Inputs
OCRnRB[11:0]
OCRnRA[11:0]
OCRnSA[11:0]
OCRnRB[15:12]
OCRnSB[11:0]
PICRn[11:0]
IRQ PSCn
SYnIn
PSCINn
Analog
Comparator
n Output
PSCOUTn0
PSCOUTn2
SYnOut
CLK
4
12
12
12
12
CLK
PSCOUTn1
PSCOUTn3
12
PSCnASY
StopOut
StopIn
I/O
PLL
(1)
(1)
(Flank Width
Modulation)
Name
Description
Type
Width
OCRnRB[11:0] Compare Value which Reset Signal on Part B (PSCOUTn1)
Register
12 bits
OCRnSB[11:0] Compare Value which Set Signal on Part B (PSCOUTn1)
Register
12 bits
OCRnRA[11:0] Compare Value which Reset Signal on Part A (PSCOUTn0)
Register
12 bits
OCRnSA[11:0] Compare Value which Set Signal on Part A (PSCOUTn0)
Register
12 bits