Datasheet

65
7734Q–AVR–02/12
AT90PWM81/161
For AT90PWM161
.org 0x001
0x002 rjmp PSC2_CAPT ; PSC2 Capture event Handler
0x004 rjmp PSC2_EC ; PSC2 End Cycle Handler
... ... ... ;
0x03F rjmp SPM_RDY ; Store Program Memory Ready Handler
;
.org 0xC00
0xC00 RESET: ldi r16,high(RAMEND); Main program start
0xC01 out SPH,r16 ; Set Stack Pointer to top of RAM
0xC02 ldi r16,low(RAMEND)
0xC03 out SPL,r16
0xC04 sei ; Enable interrupts
0xC05 <instr> xxx
When the BOOTRST Fuse is programmed, the Boot section size set to 2Kbytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in AT90PWM81/161 is:
Address Labels Code Comments
;
For AT90PWM81
.org 0xC00
0xC00 rjmp RESET ; Reset handler
0xC01 rjmp PSC2_CAPT ; PSC2 Capture event Handler
0xC02 rjmp PSC2_EC ; PSC2 End Cycle Handler
... ... ... ;
0xC1F rjmp SPM_RDY ; Store Program Memory Ready Handler
For AT90PWM161
.org 0xC00
0xC00 rjmp RESET ; Reset handler
0xC02 rjmp PSC2_CAPT ; PSC2 Capture event Handler
0xC04 rjmp PSC2_EC ; PSC2 End Cycle Handler
... ... ... ;
0xC3F rjmp SPM_RDY ; Store Program Memory Ready Handler
;
0xC20 RESET: ldi r16,high(RAMEND); Main program start
0xC21 out SPH,r16 ; Set Stack Pointer to top of RAM
0xC22 ldi r16,low(RAMEND)
0xC23 out SPL,r16
0xC24 sei ; Enable interrupts
0xC25 <instr> xxx
8.1.1 Moving Interrupts Between Application and Boot Space
The MCU Control Register controls the placement of the Interrupt Vector table.