Datasheet

56
7734Q–AVR–02/12
AT90PWM81/161
user can avoid the four conditions above to ensure that the reference is turned off before enter-
ing Power-down mode.
7.3.2 Voltage Reference Characteristics
Note: 1. Values are guidelines only.
7.4 Watchdog Timer
AT90PWM81/161 has an Enhanced Watchdog Timer (WDT). The main features are:
•
Clocked from separate On-chip Oscillator
• Three operating modes
–Interrupt
– System reset
– Interrupt and system reset
• Selectable time-out period from 1ms to 8s
• Possible hardware fuse watchdog always on (WDTON) for fail-safe mode
Figure 7-7. Watchdog timer.
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128kHz oscillator.
The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.
In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset
- instruction to restart the counter before the time-out value is reached. If the system doesn't
restart the counter, an interrupt or system reset will be issued.
Table 7-4. Internal voltage reference characteristics
(1)
.
Symbol Parameter Condition Minimum Typical Maximum Units
V
BG
Bandgap reference voltage 1.1 V
t
BG
Bandgap reference start-up
time
40 µs
I
BG
Bandgap reference current
consumption
15 µA
128 KHz
OSCILLATOR
MCU RESET
INTERRUPT
WDIE
WDIF
OSC/2K
OSC/4K
OSC/8K
WDP3
OSC/128
OSC/1K
OSC/256 OSC/512