Datasheet

52
7734Q–AVR–02/12
AT90PWM81/161
Figure 7-2. MCU start-up, RESET tied to V
CC
.
Figure 7-3. MCU start-up, RESET
extended externally.
7.1.4 External Reset
An External Reset is generated by a low level on the RESET
pin. Reset pulses longer than the
minimum pulse width (see Table 7-1 on page 51) will generate a reset, even if the clock is not
running. Shorter pulses are not guaranteed to generate a reset. When the applied signal
reaches the Reset Threshold Voltage – V
RST
– on its positive edge, the delay counter starts the
MCU after the Time-out period – t
TOUT
– has expired.
Figure 7-4. External reset during operation.
V
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
CC
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
V
CC
CC