Datasheet

i
7734Q–AVR–02/12
AT90PWM81/161
Table Of Contents
Features ..................................................................................................... 1
1 Products Configuration ........................................................................... 2
2 Pin Configurations ................................................................................... 3
2.1 Pin Descriptions .................................................................................................6
3 AVR CPU Core .......................................................................................... 8
3.1 Introduction ........................................................................................................8
3.2 Architectural Overview .......................................................................................8
3.3 ALU – Arithmetic Logic Unit ...............................................................................9
3.4 Status Register ................................................................................................10
3.5 General Purpose Register File ........................................................................11
3.6 Stack Pointer ...................................................................................................12
3.7 Instruction Execution Timing ...........................................................................12
3.8 Reset and Interrupt Handling ...........................................................................13
4 Memories ................................................................................................ 16
4.1 In-System Reprogrammable Flash Program Memory .....................................16
4.2 SRAM Data Memory ........................................................................................17
4.3 EEPROM Data Memory ..................................................................................18
4.4 Fuse Bits ..........................................................................................................22
4.5 I/O Memory ......................................................................................................26
4.6 General Purpose I/O Registers .......................................................................26
5 System Clock and Clock Options ......................................................... 27
5.1 Clock Systems and their Distribution ...............................................................27
5.2 Clock Sources .................................................................................................28
5.3 Dynamic Clock Switch .....................................................................................35
5.4 System Clock Prescaler ..................................................................................39
5.5 Register Description ........................................................................................39
6 Power Management and Sleep Modes ................................................. 45
6.1 Sleep Modes ....................................................................................................45
6.2 Idle Mode .........................................................................................................45
6.3 ADC Noise Reduction Mode ............................................................................46
6.4 Power-down Mode ...........................................................................................46
6.5 Standby Mode .................................................................................................46