Datasheet

318
7734Q–AVR–02/12
AT90PWM81/161
27. In chapter “PFRC0B - PSCR Input B Control Register” on page 175, in bullet point “Bit 3:0 –
PRFM0x3:0: PSCR Fault Mode”, page 176, the text “PSCR Functional Specification” has
been replaced by “Table 13-5 on page 160”.
28. In “Bit 2, 1, 0– AC3M2, AC3M1, AC3M0: Analog Comparator 3 Multiplexer register”,
page 199, the reference “Table 16-4” has been corrected to “Table 16-6”.
29. In Table 21-5 on page 250, the reference “Table 113” has been corrected to “
Table 20-7 on
page 246
” two places.
30. In chapter “Signal Names” on page 252, the text “in the following table” has been replaced
by the reference “Table 21-8 on page 252”.
31. Several cross references have been corrected.
32. The text “The accuracy of this calibration is shown as Factory calibration in Table 24-1 on
page 277” on page 30 has been changed into “The accuracy of this calibration is shown as
Factory calibration in Table 22-2 on page 270”.
33. The first Note in Bit 2– CKRC81: Frequency Selection of the calibrated 8/1MHz RC
Oscillator on page 42 is corrected to This bit only can be changed only when the RC
oscillator is enabled.
34. Note 1 below Figure 16-1 on page 195 is changed to “Refer to Figure 2-1 on page 3 and
Figure 2-2 on page 4 for Analog Comparator pin placement.”
35. Figure 16-2 on page 196 has been corrected.
36. In “MISO/ACMP3/ADC8– Bit 6” on page 75 the “DDB0” has been corrected to “DDB6”, and
the “PORTB0” has been corrected to “PORTB6”.
37. In “ADC5/ACMP2/INT1/SCK – Bit 5” on page 76 the “DDD4” has been corrected to “DDB5”,
and the “PORT” has been corrected to “PORTB5”.
38. In “MOSI/ADC3/ACMPM– Bit 4” on page 76 the “DDB1” has been corrected to “DDB4”, and
the “PORTB1” has been corrected to “PORTB4”.
39. Missing information in Table 9-4 on page 77, Table 9-5 on page 77, Table 9-7 on page 79,
Table 9-8 on page 80 and Table 9-10 on page 81 has been added.
40. Paragraphs one and two in “In-System Reprogrammable Flash Program Memory” on page
16 have been changed to to include more data regarding the AT90PWM161.
41. The text “TBD” in Table 21-7 on page 251 has been changed into “8B”.
42. The text in bullet point number three below Table 21-7 on page 251 has been expanded to
include the AT90PWM161.
43. The text “Calibration accuracy” in the heading of Table 22-2 on page 270 has been changed
into “Accuracy”.
44. The text “AT90PWM161 revA” has been added to the heading in Section 27.5 on page 311.
45. JMP and CALL instructions are added to “BRANCH INSTRUCTIONS” in Section 25. on
page 301.
46. “Errata AT90PWM161 revA” on page 312 and “Errata AT90PWM161 revB” on page 313 are
added.
47. In “Errata AT90PWM161 revB” on page 313, and in “Errata AT90PWM161 revA” on page
312 the PSCRRB fuse is added.
48. In “Features” on page 227 the bullet points “The DAC could be connected to the negative
inputs of the analog comparators and/or to a dedicated output driver” and “Output
impedance around 1KOhm” have been removed.
49. The text “AMP3D” has been replaced by “ACMP3D” in “DIDR0 - Digital Input Disable
Register 0” on page 202, “DIDR0 - Digital Input Disable Register 0” on page 222, and
“Register Summary” on page 297.