Datasheet

27
7734Q–AVR–02/12
AT90PWM81/161
5. System Clock and Clock Options
The Atmel AT90PWM81/161 provides a large number of clock sources. Those can be divided in
two categories: internal and external.
After reset, CKSEL fuses select one clock source. Once the device is running, software clock
switching is available on any other clock sources.
Some hardware controls are provided for clock switching management but some specific proce-
dures must be observed. Some settings may lead the user to program the device in an
inadequate configuration.
5.1 Clock Systems and their Distribution
Figure 5-1 presents the principal clock systems in the AVR and their distribution. All of the clocks
may not be active at a given time. In order to reduce power consumption, the clocks from mod-
ules not being used can be halted by using different sleep modes or by using features of the
dynamic clock switch (“Power Management and Sleep Modes” on page 45 or “Dynamic Clock
Switch” on page 35). The clock systems are detailed below.
Figure 5-1. Clock distribution.
5.1.1 clk
CPU
- CPU Clock
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
General I/O
Modules
ADC CPU Core RAM
clk
I/O
AVR Clock
Control Unit
clk
CPU
Flash and
EEPROM
clk
FLASH
clk
ADC
Source Clock
Watchdog Timer
Watchdog
Oscillator
Reset Logic
Watchdog Clock
Calibrated RC
Oscillator
(Crystal
Oscillator)
External Clock
PSC2/PSCR
PLL
CLK
PLL
Multiplexer
PLL Input
Prescaler
Clock switch
XTAL2XTAL1
CKOUT
Fuse
CLKO
CLK
PLL
/4