Datasheet

263
7734Q–AVR–02/12
AT90PWM81/161
Figure 21-8. Serial programming waveforms.
Table 21-15. Minimum wait delay before writing the next flash or EEPROM location.
Symbol Minimum wait delay
t
WD_FLASH
4.5ms
t
WD_EEPROM
3.6ms
t
WD_ERASE
9.0ms
MSB
MSB
LSB
LSB
SERIAL CLOCK INPUT
(SCK)
SERIAL DATA INPUT
(MOSI)
(MISO)
SAMPLE
SERIAL DATA OUTPUT
Table 21-16. Serial programming instruction set.
Instruction
Instruction format
OperationByte 1 Byte 2 Byte 3 Byte 4
Programming enable
1010 1100 0101 0011 xxxx xxxx xxxx xxxx Enable serial programming after
RESET
goes low
Chip erase 1010 1100 100x xxxx xxxx xxxx xxxx xxxx Chip erase EEPROM and flash
Read program memory
0010 H000 000a aaaa bbbb bbbb oooo oooo Read H (high or low) data o from
Program memory at word address a:b
Load program memory page
0100 H000 000x xxxx xxbb bbbb iiii iiii Write H (high or low) data i to Program
Memory page at word address b. Data
low byte must be loaded before Data
high byte is applied within the same
address
Write program memory page
0100 1100 000a aaaa bbxx xxxx xxxx xxxx Write Program Memory Page at
address a:b
Read EEPROM memory
1010 0000 000x xxaa bbbb bbbb oooo oooo Read data o from EEPROM memory at
address a:b
Write EEPROM memory
1100 0000 000x xxaa bbbb bbbb iiii iiii Write data i to EEPROM memory at
address a:b
Load EEPROM memory
page (page access)
1100 0001 0000 0000 0000 00bb iiii iiii Load data i to EEPROM memory page
buffer. After data is loaded, program
EEPROM page
Write EEPROM memory
page (page access)
1100 0010 00xx xxaa bbbb bb00 xxxx xxxx
Write EEPROM page at address a:b
Read lock bits
0101 1000 0000 0000 xxxx xxxx xxoo oooo Read Lock bits. “0” = programmed, “1”
= unprogrammed. See Table 21-1 on
page 248 for details