Datasheet

249
7734Q–AVR–02/12
AT90PWM81/161
Notes: 1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed.
21.2 Fuse Bits
The AT90PWM81/161 has three Fuse bytes. Table 21-4 to Table 21-6 on page 251 describe
briefly the functionality of all the fuses and how they are mapped into the Fuse bytes. Note that
the fuses are read as logical zero, “0”, if they are programmed.
Notes: 1. See Table 7-2 on page 53 for BODLEVEL Fuse decoding.
21.2.1 PSC Output Behavior During Reset
For external component safety reason, the state of PSC outputs during Reset can be pro-
grammed by fuses PSCRV, PSCRRB & PSC2RB.
These fuses are located in the Extended Fuse Byte (see Table 21-4).
Table 21-3. Lock bit protection modes
(1)(2)
. Only ATmega88/168.
BLB0 mode BLB02 BLB01
1 1 1 No restrictions for SPM or LPM accessing the Application section.
2 1 0 SPM is not allowed to write to the Application section.
300
SPM is not allowed to write to the Application section, and LPM executing from the Boot Loader
section is not allowed to read from the Application section. If Interrupt Vectors are placed in the
Boot Loader section, interrupts are disabled while executing from the Application section.
401
LPM executing from the Boot Loader section is not allowed to read from the Application section.
If Interrupt Vectors are placed in the Boot Loader section, interrupts are disabled while
executing from the Application section.
BLB1 mode BLB12 BLB11
1 1 1 No restrictions for SPM or LPM accessing the Boot Loader section.
2 1 0 SPM is not allowed to write to the Boot Loader section.
300
SPM is not allowed to write to the Boot Loader section, and LPM executing from the Application
section is not allowed to read from the Boot Loader section. If Interrupt Vectors are placed in the
Application section, interrupts are disabled while executing from the Boot Loader section.
401
LPM executing from the Application section is not allowed to read from the Boot Loader section.
If Interrupt Vectors are placed in the Application section, interrupts are disabled while executing
from the Boot Loader section.
Table 21-4. Extended Low Fuse byte.
Extended fuse byte Bit No Description Default value
PSC2RB 7 PSC2 reset behavior 1
PSC2RBA 6 PSC2 reset behavior for OUT22 & 23 1
PSCRRB 5 PSC reduced reset behavior 1
PSCRV 4 PSCOUT & PSCOUTR reset value 1
PSCINRB 3 PSC & PSCR inputs reset behavior 1
BODLEVEL2
(1)
2 Brown-out detector trigger level 1 (unprogrammed)
BODLEVEL1
(1)
1 Brown-out detector trigger level 0 (programmed)
BODLEVEL0
(1)
0 Brown-out detector trigger level 1 (unprogrammed)