Datasheet

23
7734Q–AVR–02/12
AT90PWM81/161
Notes: 1. See “Alternate Functions of Port E” on page 80 for description of RSTDISBL fuse.
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See “Watchdog timer configuration.” on page 60 for details.
4. The default value of BOOTSZ1..0 results in maximum boot size.
Note: 1. The default value of SUT1..0 results in maximum start-up time for the default clock source.
See Table 5-4 on page 30 for details.
2. The default setting of CKSEL3..0 results in internal RC oscillator @ 8MHz. See Table 5-1 on
page 28 for details.
3. The CKOUT fuse allows the system clock to be output on PORTD0. See “Clock Output Buffer”
on page 34 for details.
4. See “System Clock Prescaler” on page 39 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Table 4-4. Fuse high byte.
High fuse byte Bit no. Description Default value
RSTDISBL
(1)
7 External reset disable 1 (unprogrammed)
DWEN 6 debugWIRE enable 1 (unprogrammed)
SPIEN
(2)
5
Enable serial program and data
downloading
0 (programmed, SPI
programming enabled)
WDTON
(3)
4 Watchdog timer always on 1 (unprogrammed)
EESAVE 3
EEPROM memory is preserved
through the chip erase
1 (unprogrammed), EEPROM
not reserved
BOOTSZ1 2
Select boot size
(see Table 20-7 on page 246 for
details)
0 (programmed)
(4)
BOOTSZ0 1
Select boot size
(see Table 20-7 on page 246 for
details)
0 (programmed)
(4)
BOOTRST 0 Select reset vector 1 (unprogrammed)
Table 4-5. Fuse low byte.
Low fuse byte Bit no. Description Default value
CKDIV8
(4)
7 Divide clock by 8 0 (programmed)
CKOUT
(3)
6 Clock output 1 (unprogrammed)
SUT1 5 Select start-up time 1 (unprogrammed)
(1)
SUT0 4 Select start-up time 0 (programmed)
(1)
CKSEL3 3 Select clock source 0 (programmed)
(2)
CKSEL2 2 Select clock source 0 (programmed)
(2)
CKSEL1 1 Select clock source 1 (unprogrammed)
(2)
CKSEL0 0 Select clock source 0 (programmed)
(2)