Datasheet

22
7734Q–AVR–02/12
AT90PWM81/161
The order the different bits and registers should be accessed is:
1 Write EEPAGE in EECR (loading of temporary EEPROM buffer is enabled).
2 Write the address bits needed to address bytes within a page into EEARL.
3 Write data to EEDR.
4 Repeat 2 and 3 above until the buffer is filled up or until all data is loaded.
5 Write the remaining address bits into EEARH:EEARL.
a. Select which programming mode that should be executed (EEPMn bits). Write the EEPE
bit in EECR (within four cycles after EEMPE has been written) to start a program opera-
tion. The temporary EEPROM page buffer will auto-erase after program operation is
completed.
OR
b. If an error situation occurred and the loading should be terminated by software: Write
EEPM1:0 to 0b11 and trigger the flushing by writing EEPE (within four cycles after
EEMPE has been written).
4.4 Fuse Bits
The AT90PWM81/161 has three Fuse bytes. Table 4-3 through Table 4-5 on page 23 describe
briefly the functionality of all the fuses and how they are mapped into the Fuse bytes. Note that
the fuses are read as logical zero, “0”, if they are programmed.
Notes: 1. See Table 7-2 on page 53 for BODLEVEL fuse decoding.
Table 4-3. Extended low fuse byte.
Extended fuse byte Bit no. Description Default value
PSC2RB 7 PSC2 reset behavior 1
PSC2RBA 6 PSC2 reset behavior for OUT22 & 23 1
PSCRRB 5 PSC reduced reset behavior 1
PSCRV 4 PSCOUT & PSCOUTR reset value 1
PSCINRB 3 PSC & PSCR inputs reset behavior 1
BODLEVEL2
(1)
2 Brown-out detector trigger level 1 (unprogrammed)
BODLEVEL1
(1)
1 Brown-out detector trigger level 0 (programmed)
BODLEVEL0
(1)
0 Brown-out detector trigger level 1 (unprogrammed)