Datasheet

202
7734Q–AVR–02/12
AT90PWM81/161
16.4.6 DIDR0 - Digital Input Disable Register 0
• Bit 7:0 – ACMPMxD and ACMPxD: ACMPxMD, ACMPxD & APM0+Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding Analog pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to one of these pins and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
16.4.7 DIDR1 - Digital Input Disable Register 1
• Bit 3, 0: ACMPxMD, ACMPxD & APM0+ Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding analog pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to one of these pins and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit 76543210
ADC8D
ACMP3D
ADC7D
AMP0-D
ADC5D
ACMP2D
ADC4D
ACMP3MD
ADC3D
ACMPMD
ADC2D
ACMP2MD
ADC1D ADC0D
ACMP1D
DIDR0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
- - - -ACMP1MDAMP0+D ADC10D ADC9D DIDR1
Read/Write - - R/W R/W R/W R/W R/W R/W
Initial Value00000000