Datasheet

16
7734Q–AVR–02/12
AT90PWM81/161
4. Memories
This section describes the different memories in the Atmel AT90PWM81/161. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the AT90PWM81/161 features an EEPROM Memory for data storage. All three mem-
ory spaces are linear and regular.
4.1 In-System Reprogrammable Flash Program Memory
The AT90PWM81/161 contains 8/16Kbytes On-chip In-System Reprogrammable Flash memory
for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as
4K × 16bits for the AT90PWM81, and 8K × 16bits for the AT90PWM161. For software security,
the Flash Program memory space is divided into two sections, Boot Program section and Appli-
cation Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The AT90PWM81
Program Counter (PC) is 12 bits wide, thus addressing the 8Kbytes program memory locations.
The AT90PWM161 Program Counter (PC) is 13 bits wide, thus addressing the 16Kbytes pro-
gram memory locations. The operation of Boot Program section and associated Boot Lock bits
for software protection are described in detail in “Boot Loader Support – Read-While-Write Self-
Programming” on page 233. “Memory Programming” on page 248 contains a detailed descrip-
tion on Flash programming in SPI or Parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the
description of LPM – Load Program Memory in “Instruction Set Summary” on page 301).
Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-
ing” on page 12.
Figure 4-1. Program memory map.
0x0000
0x0FFF/0x1FFF
Program Memory
Application Flash Section
Boot Flash Section