Datasheet

149
7734Q–AVR–02/12
AT90PWM81/161
13.4 Signal Description
Figure 13-2. PSCR external block view.
13.4.1 Input Description
Table 13-1. Internal inputs.
OCRrRB[11:0]
OCRrRA[11:0]
OCRrSA[11:0]
OCRrSB[11:0]
PICRr[11:0]
IRQ PSCr
PSCINr
Analog
Comparator
Output
PSCOUTr0
CLK
12
12
12
12
CLK
PSCOUTr1
12
PSCrASY
I/O
PLL
3
Name Description Type width
OCRrRB[11:0] Compare value which reset signal on Part B (PSCOUTr1) Register 12 bits
OCRrSB[11:0] Compare value which set signal on Part B (PSCOUTr1) Register 12 bits
OCRrRA[11:0] Compare value which reset signal on Part A (PSCOUTr0) Register 12 bits
OCRrSA[11:0] Compare value which set signal on Part A (PSCOUTr0) Register 12 bits
CLK I/O Clock input from I/O clock Signal
CLK PLL Clock input from PLL Signal