Datasheet

129
7734Q–AVR–02/12
AT90PWM81/161
12.18.2 Event Capture
The PSC can capture the value of time (PSC counter) when a retrigger event or fault event
occurs on PSC inputs. This value can be read by software in PICRnH/L register.
12.18.3 Using the Input Capture Unit
The main challenge when using the Input Capture unit is to assign enough processor capacity
for handling the incoming events. The time between two events is critical. If the processor has
not read the captured value in the PICR1 Register before the next event occurs, the PICR1 will
be overwritten with a new value. In this case the result of the capture will be incorrect.
When using the Input Capture interrupt, the PICR1 Register should be read as early in the inter-
rupt handler routine as possible. Even though the Input Capture interrupt has relatively high
priority, the maximum interrupt response time is dependent on the maximum number of clock
cycles it takes to handle any of the other interrupt requests.
12.19 PSC2 Outputs
12.19.1 Output Matrix
PSC2 has an output matrix which allow in 4 ramp mode to program a value of PSCOUT20 and
PSCOUT21 binary value for each ramp.
PSCOUT2m takes the value given in Table 12-9. during all corresponding ramp. Thanks to the
Output Matrix it is possible to generate all kind of PSCOUT20/PSCOUT21 combination.
When Output Matrix is used, the PSC n Output Polarity POPn has no action on the outputs.
7 Valid Valid Valid Valid
8 Valid Valid Valid Do not use
9 Valid Valid Valid Do not use
10
Do not use
11
12
13
14 Valid Valid Valid Do not use
15 Do not use
Table 12-8. Available input modes according to running modes. (Continued)
Input mode
number: 1 ramp mode 2 ramp mode 4 ramp mode Centered mode
Table 12-9. Output matrix versus ramp number.
Ramp 0 Ramp 1 Ramp 2 Ramp 3
PSCOUT20 POMV2A0 POMV2A1 POMV2A2 POMV2A3
PSCOUT21 POMV2B0 POMV2B1 POMV2B2 POMV2B3