Datasheet

3
4235K–8051–05/08
AT89C51RD2/ED2
2. Block Diagram
Figure 2-1. Block Diagram
Timer 0
INT
RAM
256x8
T0 T1
RxD TxD
WR
RD
EA
PSEN
ALE/
XTALA2
XTALA1 EUART
CPU
Timer 1
INT1
Ctrl
INT0
(2)
(2)
C51
CORE
(2) (2) (2) (2)
Port 0
P0
Port 1
Port 2
Port 3
P1 P2 P3
XRAM
1792 x 8
IB-bus
PCA
RESET
PROG
Watch
-dog
PCA ECI
VSS VCC
(2)(2)
(1)
(1): Alternate function of Port 1
(2): Alternate function of Port 3
(1)
Timer2
T2EX
T2
(1) (1)
Flash
64K x 8
Keyboard
(1)
Keyboard
MISO
MOSI
SCK
SS
Port4
P4
(1)
(1)
(1)
(1)
BOOT
2K x 8
ROM
Regulator
POR / PFD
Port 5
P5
Parallel I/O Ports &
External Bus
SPI
EEPROM*
2K x 8
(AT89C51ED2)