Datasheet
Table Of Contents
- Features
- Description
- Block Diagram
- SFR Mapping
- Pin Configurations
- Oscillators
- Enhanced Features
- Dual Data Pointer Register DPTR
- Expanded RAM (XRAM)
- Reset
- Power Monitor
- Timer 2
- Programmable Counter Array PCA
- Serial I/O Port
- Interrupt System
- Power Management
- Keyboard Interface
- 2-wire Interface (TWI)
- Serial Port Interface (SPI)
- Hardware Watchdog Timer
- ONCE(TM) Mode (ON Chip Emulation)
- Power-off Flag
- EEPROM Data Memory
- Reduced EMI Mode
- Flash Memory
- Electrical Characteristics
- Absolute Maximum Ratings
- DC Parameters
- AC Parameters
- Explanation of the AC Symbols
- External Program Memory Characteristics
- External Program Memory Read Cycle
- External Data Memory Characteristics
- External Data Memory Write Cycle
- External Data Memory Read Cycle
- Serial Port Timing - Shift Register Mode
- Shift Register Timing Waveforms
- External Clock Drive Waveforms
- AC Testing Input/Output Waveforms
- Float Waveforms
- Clock Waveforms
- Ordering Information
- Packaging Information
- Table of Contents
77
AT89C51ID2
4289C–8051–11/05
Registers Table 59. KBF Register
KBF-Keyboard Flag Register (9Eh)
Reset Value= 0000 0000b
This register is read only access, all flags are automatically cleared by reading the
register.
76543210
KBF7 KBF6 KBF5 KBF4 KBF3 KBF2 KBF1 KBF0
Bit
Number
Bit
Mnemonic Description
7 KBF7
Keyboard line 7 flag
Set by hardware when the Port line 7 detects a programmed level. It generates a
Keyboard interrupt request if the KBKBIE. 7 bit in KBIE register is set.
Must be cleared by software.
6 KBF6
Keyboard line 6 flag
Set by hardware when the Port line 6 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 6 bit in KBIE register is set.
Must be cleared by software.
5 KBF5
Keyboard line 5 flag
Set by hardware when the Port line 5 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 5 bit in KBIE register is set.
Must be cleared by software.
4 KBF4
Keyboard line 4 flag
Set by hardware when the Port line 4 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 4 bit in KBIE register is set.
Must be cleared by software.
3 KBF3
Keyboard line 3 flag
Set by hardware when the Port line 3 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 3 bit in KBIE register is set.
Must be cleared by software.
2 KBF2
Keyboard line 2 flag
Set by hardware when the Port line 2 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 2 bit in KBIE register is set.
Must be cleared by software.
1 KBF1
Keyboard line 1 flag
Set by hardware when the Port line 1 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 1 bit in KBIE register is set.
Must be cleared by software.
0 KBF0
Keyboard line 0 flag
Set by hardware when the Port line 0 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE. 0 bit in KBIE register is set.
Must be cleared by software.