Datasheet

2
AT89C51ID2
4289C–8051–11/05
The AT89C51ID2 retains all features of the Atmel 80C52 with 256 bytes of internal
RAM, a 10-source 4-level interrupt controller and three timer/counters.
In addition, the AT89C51ID2 has a Programmable Counter Array, an XRAM of 1792
bytes, a Hardware Watchdog Timer, SPI and Keyboard, a more versatile serial channel
that facilitates multiprocessor communication (EUART) and a speed improvement
mechanism (X2 mode).
The fully static design of the AT89C51ID2 allows to reduce system power consumption
by bringing the clock frequency down to any value, even DC, without loss of data.
The AT89C51ID2 has 2 software-selectable modes of reduced activity and 8-bit clock
prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen
while the peripherals and the interrupt system are still operating. In the power-down
mode the RAM is saved and all other functions are inoperative.
The added features of the AT89C51ID2 make it more powerful for applications that need
pulse width modulation, high speed I/O and counting capabilities such as alarms, motor
control, corded phones, smart card readers.
Table 1. Memory Size and I/O pins
AT89C51ID2 Flash (bytes) XRAM (bytes)
TOTAL RAM
(bytes) I/O
PLCC44/VQFP44 64K 1792 2048 34