Datasheet
Table Of Contents
- Features
- Description
- Block Diagram
- SFR Mapping
- Pin Configurations
- Oscillators
- Enhanced Features
- Dual Data Pointer Register DPTR
- Expanded RAM (XRAM)
- Reset
- Power Monitor
- Timer 2
- Programmable Counter Array PCA
- Serial I/O Port
- Interrupt System
- Power Management
- Keyboard Interface
- 2-wire Interface (TWI)
- Serial Port Interface (SPI)
- Hardware Watchdog Timer
- ONCE(TM) Mode (ON Chip Emulation)
- Power-off Flag
- EEPROM Data Memory
- Reduced EMI Mode
- Flash Memory
- Electrical Characteristics
- Absolute Maximum Ratings
- DC Parameters
- AC Parameters
- Explanation of the AC Symbols
- External Program Memory Characteristics
- External Program Memory Read Cycle
- External Data Memory Characteristics
- External Data Memory Write Cycle
- External Data Memory Read Cycle
- Serial Port Timing - Shift Register Mode
- Shift Register Timing Waveforms
- External Clock Drive Waveforms
- AC Testing Input/Output Waveforms
- Float Waveforms
- Clock Waveforms
- Ordering Information
- Packaging Information
- Table of Contents

148
AT89C51ID2
4289Cā8051ā11/05
Table 105. AC Parameters for a Fix Clock
Table 106. AC Parameters for a Variable Clock
Shift Register Timing
Waveforms
External Clock Drive
Waveforms
Symbol
-M -L
UnitsMin Max Min Max
T
XLXL
300 300 ns
T
QVHX
200 200 ns
T
XHQX
30 30 ns
T
XHDX
00ns
T
XHDV
117 117 ns
Symbol Type
Standard
Clock X2 Clock
X Parameter For
-M Range
X Parameter For
-L Range Units
T
XLXL
Min 12 T 6 T ns
T
QVHX
Min 10 T - x 5 T - x 50 50 ns
T
XHQX
Min 2 T - x T - x 20 20 ns
T
XHDX
Min x x 0 0 ns
T
XHDV
Max 10 T - x 5 T- x 133 133 ns
INPUT DATA
VALIDVALID VALID VALID
0123456 87
ALE
CLOCK
OUTPUT DATA
WRITE to SBUF
CLEAR RI
T
XLXL
T
QVXH
T
XHQX
T
XHDV
T
XHDX
SET TI
SET RI
INSTRUCTION
01234567
VALID VALID VALID VALID
V
CC
-0.5V
0.45V
0.7V
CC
0.2V
CC
-0.1
T
CHCL
T
CLCX
T
CLCL
T
CLCH
T
CHCX