Datasheet
Table Of Contents
- Features
- Description
- Block Diagram
- SFR Mapping
- Pin Configurations
- Oscillators
- Enhanced Features
- Dual Data Pointer Register DPTR
- Expanded RAM (XRAM)
- Reset
- Power Monitor
- Timer 2
- Programmable Counter Array PCA
- Serial I/O Port
- Interrupt System
- Power Management
- Keyboard Interface
- 2-wire Interface (TWI)
- Serial Port Interface (SPI)
- Hardware Watchdog Timer
- ONCE(TM) Mode (ON Chip Emulation)
- Power-off Flag
- EEPROM Data Memory
- Reduced EMI Mode
- Flash Memory
- Electrical Characteristics
- Absolute Maximum Ratings
- DC Parameters
- AC Parameters
- Explanation of the AC Symbols
- External Program Memory Characteristics
- External Program Memory Read Cycle
- External Data Memory Characteristics
- External Data Memory Write Cycle
- External Data Memory Read Cycle
- Serial Port Timing - Shift Register Mode
- Shift Register Timing Waveforms
- External Clock Drive Waveforms
- AC Testing Input/Output Waveforms
- Float Waveforms
- Clock Waveforms
- Ordering Information
- Packaging Information
- Table of Contents
110
AT89C51ID2
4289C–8051–11/05
Power-off Flag The power-off flag allows the user to distinguish between a “cold start” reset and a
“warm start” reset.
A cold start reset is the one induced by V
CC
switch-on. A warm start reset occurs while
V
CC
is still applied to the device and could be generated for example by an exit from
power-down.
The power-off flag (POF) is located in PCON register (Table 85). POF is set by hard-
ware when V
CC
rises from 0 to its nominal voltage. The POF can be set or cleared by
software allowing the user to determine the type of reset.
Table 85. PCON Register
PCON - Power Control Register (87h)
Reset Value = 00X1 0000b
Not bit addressable
76543210
SMOD1 SMOD0 - POF GF1 GF0 PD IDL
Bit
Number
Bit
Mnemonic Description
7SMOD1
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
6SMOD0
Serial port Mode bit 0
Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4POF
Power-Off Flag
Cleared to recognize next reset type.
Set by hardware when V
CC
rises from 0 to its nominal voltage. Can also be set by
software.
3GF1
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
2GF0
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
1PD
Power-Down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
0IDL
Idle mode bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.