Datasheet

70
AT89C51IC2
4301D–8051–02/08
Figure 25. Power-down Exit Waveform
Exit from Power-down by reset redefines all the SFRs, exit from Power-down by exter-
nal interrupt does no affect the SFRs.
Exit from Power-down by either reset or external interrupt does not affect the internal
RAM content.
Note: If idle mode is activated with Power-down mode (IDL and PD bits set), the exit sequence
is unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and
idle mode is not entered.
Table 55 shows the state of ports during idle and power-down modes.
Port 0 can force a 0 level. A "one" will leave port floating.
INT1
INT0
XTALA
Power-down Phase Oscillator Restart Phase Active PhaseActive Phase
or
XTALB
Table 55. State of Ports
Mode Program Memory ALE PSEN PORT0 PORT1 PORT2 PORT3
Idle Internal 1 1 Port Data
(1)
Port Data Port Data Port Data
Idle External 1 1 Floating Port Data Address Port Data
Power Down Internal 0 0 Port Data
(1)
Port Data Port Data Port Data
Power Down External 0 0 Floating Port Data Port Data Port Data