Datasheet

29
AT89C51IC2
4301D–8051–02/08
Table 23. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX0X 00’HSB.XRAM’0b
Not bit addressable
7 6 5 4 3 2 1 0
- - M0 - XRS1 XRS0 EXTRAM AO
Bit
Number
Bit
Mnemonic Description
7 -
Reserved
The value read from this bit is indeterminate. Do not set this bit
6 -
Reserved
The value read from this bit is indeterminate. Do not set this bit
5 M0
Pulse length
Cleared to stretch MOVX control: the RD/ and the WR/ pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD/ and the WR/ pulse length is 30 clock
periods.
4 -
Reserved
The value read from this bit is indeterminate. Do not set this bit
3 XRS1 XRAM Size
XRS1
XRS0 XRAM size
0 0 256 bytes (default)
0 1 512 bytes
1 0 768 bytes
1 1 1024 bytes
2 XRS0
1 EXTRAM
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
0 AO
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.