Datasheet

27
AT89C51IC2
4301D–8051–02/08
Expanded RAM
(XRAM)
The AT89C51IC2 provides additional Bytes of random access memory (RAM) space for
increased data parameter handling and high level language usage.
AT89C51IC2 devices have expanded RAM in external data space; maximum size and
location are described in Table 22.
Table 22. Expanded RAM
The AT89C51IC2 has internal data memory that is mapped into four separate
segments.
The four segments are:
1. The Lower 128 bytes of RAM (addresses 00h to 7Fh) are directly and indirectly
addressable.
2. The Upper 128 bytes of RAM (addresses 80h to FFh) are indirectly addressable only.
3. The Special Function Registers, SFRs, (addresses 80h to FFh) are directly address-
able only.
4. The expanded RAM bytes are indirectly accessed by MOVX instructions, and with the
EXTRAM bit cleared in the AUXR register (see Table 22)
The lower 128 bytes can be accessed by either direct or indirect addressing. The Upper
128 bytes can be accessed by indirect addressing only. The Upper 128 bytes occupy
the same address space as the SFR. That means they have the same address, but are
physically separate from SFR space.
Figure 8. Internal and External Data Memory Address
When an instruction accesses an internal location above address 7Fh, the CPU knows
whether the access is to the upper 128 bytes of data RAM or to SFR space by the
addressing mode used in the instruction.
• Instructions that use direct addressing access SFR space. For example: MOV
0A0H, # data, accesses the SFR at location 0A0h (which is P2).
XRAM size
Address
Start End
AT89C51IC2 1024 00h 3FFh
XRAM
Upper
128 bytes
Internal
Ram
Lower
128 bytes
Internal
Ram
Special
Function
Register
80h 80h
00
0FFh or 3FFh
0FFh
00
0FFh
External
Data
Memory
0000
00FFh up to 03FFh
0FFFFh
indirect accesses
direct accesses
direct or indirect
accesses
7Fh