Datasheet

101
AT89C51IC2
4301D–8051–02/08
Table 77. SSADR (096h) - Synchronus Serial Address Register (read/write)
Table 78. SSADR Register - Reset value = FEh
7 6 5 4 3 2 1 0
A7 A6 A5 A4 A3 A2 A1 A0
Bit
Number
Bit
Mnemonic Description
7 A7 Slave Address bit 7
6 A6 Slave Address bit 6
5 A5 Slave Address bit 5
4 A4 Slave Address bit 4
3 A3 Slave Address bit 3
2 A2 Slave Address bit 2
1 A1 Slave Address bit 1
0 GC
General Call bit
Clear to disable the general call address recognition.
Set to enable the general call address recognition.