Datasheet

63
AT89C51IC2
4301D–8051–02/08
Table 51. IEN1 Register
IEN1 - Interrupt Enable Register (B1h)
Reset Value = XXXX X000b
Bit addressable
7 6 5 4 3 2 1 0
- - - - - ESPI ETWI KBD
Bit
Number
Bit
Mnemonic Description
7 - Reserved
6 - Reserved
5 - Reserved
4 - Reserved
3 - Reserved
2 ESPI
SPI interrupt Enable bit
Cleared to disable SPI interrupt.
Set to enable SPI interrupt.
1 ETWI
TWI interrupt Enable bit
Cleared to disable TWI interrupt.
Set to enable TWI interrupt.
0 KBD
Keyboard interrupt Enable bit
Cleared to disable keyboard interrupt.
Set to enable keyboard interrupt.