Datasheet

AT89C51CC03

4182O–CAN–09/08

Hardware Security Byte Table 24. Hardware Security Byte

After erasing the chip in parallel mode, the default value is : FFh

The erasing in ISP mode (from bootloader) does not modify this byte.

Notes: 1. Only the 4 MSB bits can be accessed by software.

2. The 4 LSB bits can only be accessed by parallel mode.

76543210

X2B BLJB - - - LB2 LB1 LB0

Bit

Number

Bit

Mnemonic Description

7X2B

X2 Bit

Set this bit to start in standard mode

Clear this bit to start in X2 mode.

6BLJB

Boot Loader JumpBit

- 1: To start the user’s application on next RESET (@0000h) located in FM0,

- 0: To start the boot loader(@F800h) located in FM1.

5-3 -

Reserved

The value read from these bits are indeterminate.

2-0 LB2:0 Lock Bits