Datasheet

167
AT89C51CC03
4182O–CAN–09/08
Table 115. IPH1 Register
IPH1 (S:F7h)
Interrupt High Priority Register 1
Reset Value = XXXX 0000b
76543210
----SPIHPOVRHPADCH PCANH
Bit
Number
Bit
Mnemonic Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3SPIH
SPI Interrupt Priority Level Most Significant bit
SPIH
SPIL Priority level
0 0 Lowest
0 1
1 0
1 1 Highest
2POVRH
Timer overrun Interrupt Priority Level Most Significant bit
POVRH
POVRL Priority level
0 0 Lowest
0 1
1 0
1 1 Highest
1 PADCH
ADC Interrupt Priority Level Most Significant bit
PADCH
PADCL Priority level
0 0 Lowest
0 1
1 0
1 1 Highest
0PCANH
CAN Interrupt Priority Level Most Significant bit
PCANH
PCANL Priority level
0 0 Lowest
0 1
1 0
1 1 Highest