Datasheet
70
A/T89C51CC01
4129N–CAN–03/08
Table 49. TL2 Register
TL2 (S:CCh)
Timer 2 Low Byte Register
Reset Value = 0000 0000b
Not bit addressable
Table 50. RCAP2H Register
RCAP2H (S:CBh)
Timer 2 Reload/Capture High Byte Register
Reset Value = 0000 0000b
Not bit addressable
Table 51. RCAP2L Register
RCAP2L (S:CA
H
)
T
IMER
2 R
E
load/Capture Low Byte Register
Reset Value = 0000 0000b
Not bit addressable
7 6 5 4 3 2 1 0
- - - - - - - -
Bit
Number
Bit
Mnemonic Description
7-0 Low Byte of Timer 2.
7 6 5 4 3 2 1 0
- - - - - - - -
Bit
Number
Bit
Mnemonic Description
7-0 High Byte of Timer 2 Reload/Capture.
7 6 5 4 3 2 1 0
- - - - - - - -
Bit
Number
Bit
Mnemonic Description
7-0 Low Byte of Timer 2 Reload/Capture.