Datasheet

125
A/T89C51CC01
4129N–CAN–03/08
Table 101. CCON Register
CCON (S:D8h)
PCA Counter Control Register
Reset Value = 00X0 0000b
7 6 5 4 3 2 1 0
CF CR - CCF4 CCF3 CCF2 CCF1 CCF0
Bit
Number
Bit
Mnemonic Description
7 CF
PCA Timer/Counter Overflow flag
Set by hardware when the PCA Timer/Counter rolls over. This generates a PCA
interrupt request if the ECF bit in CMOD register is set.
Must be cleared by software.
6 CR
PCA Timer/Counter Run Control bit
Clear to turn the PCA Timer/Counter off.
Set to turn the PCA Timer/Counter on.
5 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4 CCF4
PCA Module 4 Compare/Capture flag
Set by hardware when a match or capture occurs. This generates a PCA
interrupt request if the ECCF 4 bit in CCAPM 4 register is set.
Must be cleared by software.
3 CCF3
PCA Module 3 Compare/Capture flag
Set by hardware when a match or capture occurs. This generates a PCA
interrupt request if the ECCF 3 bit in CCAPM 3 register is set.
Must be cleared by software.
2 CCF2
PCA Module 2 Compare/Capture flag
Set by hardware when a match or capture occurs. This generates a PCA
interrupt request if the ECCF 2 bit in CCAPM 2 register is set.
Must be cleared by software.
1 CCF1
PCA Module 1 Compare/Capture flag
Set by hardware when a match or capture occurs. This generates a PCA
interrupt request if the ECCF 1 bit in CCAPM 1 register is set.
Must be cleared by software.
0 CCF0
PCA Module 0 Compare/Capture flag
Set by hardware when a match or capture occurs. This generates a PCA
interrupt request if the ECCF 0 bit in CCAPM 0 register is set.
Must be cleared by software.