Datasheet

40
AT89C51AC3
4383D–8051–02/08
Figure 22. External Code Fetch Waveforms
Flash Memory
Architecture
AT89C51AC3 features two on-chip Flash memories:
• Flash memory FM0:
containing 64K Bytes of program memory (user space) organized into 128 byte
pages,
• Flash memory FM1:
2K Bytes for boot loader and Application Programming Interfaces (API).
The FM0 can be program by both parallel programming and Serial In-System Program-
ming (ISP) whereas FM1 supports only parallel programming by programmers. The ISP
mode is detailed in the "In-System Programming" section.
All Read/Write access operations on Flash Memory by user application are managed by
a set of API described in the "In-System Programming" section.
The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh. Figure
23 and Figure 24 show the Flash memory configuration with ENBOOT=1 and
ENBOOT=0.
Figure 23. Flash Memory Architecture with ENBOOT=1 (boot mode)
ALE
P0
P2
PSEN#
PCL
PCHPCH
PCLD7:0 D7:0
PCH
D7:0
CPU Clock
FFFFh
64K Bytes
FM0
0000h
Hardware Security (1 byte)
Column Latches (128 Bytes)
Extra Row (128 Bytes)
2K Bytes
Flash memory
FM1
boot space
FFFFh
F800h
FM1 mapped between FFFFh and
F800h when bit ENBOOT is set in
AUXR1 register
F800h
Memory space not accessible