Datasheet

34
AT89C51AC3
4383D–8051–02/08
Registers Table 10. PCON Register
PCON (S87:h) Power configuration Register
Reset Value= XXXX 0000b
7 6 5 4 3 2 1 0
- - - - GF1 GF0 PD IDL
Bit
Number
Bit
Mnemonic Description
7-4 -
Reserved
The value read from these bits is indeterminate. Do not set these bits.
3 GF1
General Purpose flag 1
One use is to indicate whether an interrupt occurred during normal operation or
during Idle mode.
2 GF0
General Purpose flag 0
One use is to indicate whether an interrupt occurred during normal operation or
during Idle mode.
1 PD
Power-Down Mode bit
Cleared by hardware when an interrupt or reset occurs.
Set to activate the Power-Down mode.
If IDL and PD are both set, PD takes precedence.
0 IDL
Idle Mode bit
Cleared by hardware when an interrupt or reset occurs.
Set to activate the Idle mode.
If IDL and PD are both set, PD takes precedence.