Datasheet

30
AT89C51AC3
4383D–8051–02/08
Reset Output
As detailed in Section “Watchdog Timer”, page 79, the WDT generates a 96-clock
period pulse on the RST pin. In order to properly propagate this pulse to the rest of the
application in case of external capacitor or power-supply supervisor circuit, a 1 kΩ resis-
tor must be added as shown Figure 18.
Figure 18. Recommended Reset Output Schematic
RST
VDD
+
VSS
VDD
RST
1K
To other
on-board
circuitry
AT89C51AC3