Datasheet

23
AT89C51AC3
4383D–8051–02/08
Figure 11. External Data Read Waveforms
Notes: 1. RD# signal may be stretched using M0 bit in AUXR register.
2. When executing MOVX @Ri instruction, P2 outputs SFR content.
Figure 12. External Data Write Waveforms
Notes: 1. WR# signal may be stretched using M0 bit in AUXR register.
2. When executing MOVX @Ri instruction, P2 outputs SFR content.
ALE
P0
P2
RD#1
DPL or Ri D7:0
DPH or P22
P2
CPU Clock
ALE
P0
P2
WR#1
DPL or Ri D7:0
P2
CPU Clock
DPH or P22