Datasheet

77
4337K–USB–04/08
AT89C5130A/31A-M
Table 15-3. PCON Register
PCON - Power Control Register (87h)
Reset Value = 00X1 0000b
Not bit addressable
Power-off flag reset value will be 1 only after a power on (cold reset). A warm reset doesn’t affect
the value of this bit.
Table 15-4. BDRCON Register
BDRCON - Baud Rate Control Register (9Bh)
7 6 5 4 3 2 1 0
SMOD1 SMOD0 - POF GF1 GF0 PD IDL
Bit
Number
Bit
Mnemonic Description
7 SMOD1
Serial port Mode bit 1 for UART
Set to select double baud rate in mode 1, 2 or 3.
6 SMOD0
Serial port Mode bit 0 for UART
Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
5 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4 POF
Power-Off Flag
Cleared to recognize next reset type.
Set by hardware when V
CC
rises from 0 to its nominal voltage. Can also be set by
software.
3 GF1
General-purpose Flag
Cleared by user for general-purpose usage.
Set by user for general-purpose usage.
2 GF0
General-purpose Flag
Cleared by user for general-purpose usage.
Set by user for general-purpose usage.
1 PD
Power-down Mode Bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
0 IDL
Idle Mode Bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
7 6 5 4 3 2 1 0
- - - BRR TBCK RBCK SPD SRC