Datasheet

73
4337K–USB–04/08
AT89C5130A/31A-M
15.3.1 Baud Rate Selection Table for UART
15.3.2 Internal Baud Rate Generator (BRG)
When the internal Baud Rate Generator is used, the Baud Rates are determined by the BRG
overflow depending on the BRL reload value, the value of SPD bit (Speed Mode) in BDRCON
register and the value of the SMOD1 bit in PCON register.
Figure 15-5. Internal Baud Rate
• The baud rate for UART is token by formula:
Table 15-1. SCON Register – SCON Serial Control Register (98h)
TCLK
(T2CON)
RCLK
(T2CON)
TBCK
(BDRCON)
RBCK
(BDRCON)
Clock Source
UART Tx
Clock Source
UART Rx
0 0 0 0 Timer 1 Timer 1
1 0 0 0 Timer 2 Timer 1
0 1 0 0 Timer 1 Timer 2
1 1 0 0 Timer 2 Timer 2
X 0 1 0 INT_BRG Timer 1
X 1 1 0 INT_BRG Timer 2
0 X 0 1 Timer 1 INT_BRG
1 X 0 1 Timer 2 INT_BRG
X X 1 1 INT_BRG INT_BRG
BRG
0
1
/6
BRL
/2
0
1
INT_BRG
SPD
BRR
SMOD1
auto reload counter
overflow
Peripheral Clock
7 6 5 4 3 2 1 0
FE/SM0 SM1 SM2 REN TB8 RB8 TI RI
Baud_Rate =
2
SMOD1
x F CLK PERIPH
2 x 6
(1-SPD)
x 16 x [256 - (BRL)]
(BRL) = 256 -
2
SMOD1
x FCLK PERIPH
2 x 6
(1-SPD)
x 16 x Baud_Rate