Datasheet

4337K–USB–04/08

AT89C5130A/31A-M

8.3.7.3 Hardware Security

The following procedure is used to read the Hardware Security space and is summarized in

Figure 8-8:

• Map the Hardware Security space by writing 04h in FCON register.

• Read the byte in Accumulator by executing MOVC A, @A+DPTR with A = 0 & DPTR =

0000h.

Figure 8-8. Reading Procedure

8.4 Registers

Table 8-4. FCON (S:D1h)

Flash Control Register

Reset Value = 0000 0000b

Flash Spaces Reading

Flash Spaces Mapping

FCON = 00000xx0b

Data Read

DPTR = Address

ACC = 0

Exec: MOVC A, @A+DPTR

Erase Mode

FCON = 00h

7 6 5 4 3 2 1 0

FPL3 FPL2 FPL1 FPL0 FPS FMOD1 FMOD0 FBUSY

Bit Number

Bit

Mnemonic Description

7-4 FPL3:0

Programming Launch Command Bits

Write 5Xh followed by AXh to launch the programming according to FMOD1:0.

(see Table 8-3.)

3 FPS

Flash Map Program Space

Set to map the column latch space in the data memory space.

Clear to re-map the data memory space.

2-1 FMOD1:0

Flash Mode

See Table 8-2 or Table 8-3.

0 FBUSY

Flash Busy

Set by hardware when programming is in progress.

Clear by hardware when programming is done.

Can not be cleared by software.