Datasheet

172
4337K–USB–04/08
AT89C5130A/31A-M
27.4.14 Flash EEPROM Memory and Data EEPROM Memory
Table 27-12. Timing Symbol Definitions
Table 27-13. Memory AC Timing
Vcc = 3.3V ± 10%, T
A
= -40 to +85°C
Figure 27-5. Flash Memory - ISP Waveforms
Figure 27-6. Flash Memory - Internal Busy Waveforms
Signals Conditions
S (Hardware
Condition)
PSEN, EA L Low
R RST V Valid
B FBUSY Flag X No Longer Valid
Symbol Parameter Min Typ Max Unit
T
SVRL
Input PSEN Valid to RST Edge 50 ns
T
RLSX
Input PSEN Hold after RST Edge 50 ns
T
BHBL
Flash EEPROM Internal Busy (Programming)
Time
10 20 ms
T
BHBL
EEPROM Data Internal Busy (Programming)
Time
10 20 ms
Flash EEPROM program memory write cycles 100K Cycles
Configuration bits (fuses bits) memory write
cycles (BLJB, X2, OSCON0, OSCON1)
1K Cycles
EEPROM Data memory write cycles 100K Cycles
RST
T
SVRL
PSEN
T
RLSX
FBUSY bit
T
BHBL