Datasheet

143
4337K–USB–04/08
AT89C5130A/31A-M
Table 21-8. UEPCONX Register
UEPCONX (S:D4h)
USB Endpoint X Control Register
Note: 1. (X = EPNUM set in UEPNUM Register UEPNUM (S:C7h) USB Endpoint Number)
Reset Value = 80h when UEPNUM = 0 (default Control Endpoint)
Reset Value = 00h otherwise for all other endpoints
7 6 5 4 3 2 1 0
EPEN - - - DTGL EPDIR EPTYPE1 EPTYPE0
Bit Number Bit Mnemonic Description
7 EPEN
Endpoint Enable
Set this bit to enable the endpoint according to the device configuration. Endpoint 0 will
always be enabled after a hardware or USB bus reset and participate in the device
configuration.
Clear this bit to disable the endpoint according to the device configuration.
6 -
Reserved
The value read from this bit is always 0. Do not set this bit.
5 -
Reserved
The value read from this bit is always 0. Do not set this bit.
4 -
Reserved
The value read from this bit is always 0. Do not set this bit.
3 DTGL
Data Toggle (Read-only)
This bit is set by hardware when a valid DATA0 packet is received and accepted.
This bit is cleared by hardware when a valid DATA1 packet is received and accepted.
2 EPDIR
Endpoint Direction
Set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints.
Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints.
This bit has no effect for Control endpoints.
1-0 EPTYPE[1:0]
Endpoint Type
Set this field according to the endpoint configuration (Endpoint 0 will always be
configured as control):
00Control endpoint
01Isochronous endpoint
10Bulk endpoint
11Interrupt endpoint