Datasheet

141
4337K–USB–04/08
AT89C5130A/31A-M
Table 21-5. USBIEN Register
USBIEN (S:BEh)
USB Global Interrupt Enable Register
Reset Value = 10h
7 6 5 4 3 2 1 0
- - EWUPCPU EEORINT ESOFINT - - ESPINT
Bit Number Bit Mnemonic Description
7-6 -
Reserved
The value read from these bits is always 0. Do not set these bits.
5 EWUPCPU
Enable Wake Up CPU Interrupt
Set this bit to enable Wake Up CPU Interrupt. (See “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 141.)
Clear this bit to disable Wake Up CPU Interrupt.
4 EEORINT
Enable End Of Reset Interrupt
Set this bit to enable End Of Reset Interrupt. (See “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 141.). This bit is set after
reset.
Clear this bit to disable End Of Reset Interrupt.
3 ESOFINT
Enable SOF Interrupt
Set this bit to enable SOF Interrupt. (See “USBIEN Register USBIEN (S:BEh) USB
Global Interrupt Enable Register” on page 141.).
Clear this bit to disable SOF Interrupt.
2 -
Reserved
The value read from these bits is always 0. Do not set these bits.
1 -
0 ESPINT
Enable Suspend Interrupt
Set this bit to enable Suspend Interrupts (see the “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 141).
Clear this bit to disable Suspend Interrupts.