Datasheet

103
4337K–USB–04/08
AT89C5130A/31A-M
Figure 20-2. Block Diagram
Address Register
Comparator
Timing &
Control
logic
Arbitration &
Sink Logic
Serial clock
generator
Shift Register
Control Register
Status Register
Status
Decoder
Input
Filter
Output
Stage
Input
Filter
Output
Stage
ACK
Status
Bits
8
8
7
8
Internal Bus
Timer 1
overflow
F
CLK PERIPH
/4
Interrupt
SDA
SCL
SSADR
SSCON
SSDAT
SSCS