Datasheet

71
32099IS–01/2012
AT32UC3L016/32/64
Notes: 1. Standard mode: ; fast mode: .
2. A device must internally provide a hold time of at least 300 ns for TWD with reference to the falling edge of TWCK.
Notations:
C
b
= total capacitance of one bus line in pF
t
clkpb
= period of TWI peripheral bus clock
t
prescaled
= period of TWI internal prescaled clock (see chapters on TWIM and TWIS)
The maximum t
HD;DAT
has only to be met if the device does not stretch the LOW period (t
LOW-TWI
)
of TWCK.
t
SU-DAT-TWI
Data set-up time
Standard 250
2t
clkpb
-ns
Fast 100
t
SU-DAT
--t
clkpb
--
t
LOW-TWI
TWCK LOW period
Standard 4.7
4t
clkpb
- μs
Fast 1.3
t
LOW
--t
clkpb
--
t
HIGH
TWCK HIGH period
Standard 4.0
8t
clkpb
- μs
Fast 0.6
f
TWCK
TWCK frequency
Standard
-
100
kHz
Fast 400
Table 7-42. TWI-Bus Timing Requirements
Symbol Parameter Mode
Minimum Maximum
UnitRequirement Device Requirement Device
1
12t
clkpb
------------------------
f
TWCK
100 kHz≤
f
TWCK
100 kHz>