Datasheet

45
32099IS–01/2012
AT32UC3L016/32/64
Figure 7-2. Measurement Schematic, External Core Supply
7.4.1 Peripheral Power Consumption
The values in Table 7-6 are measured values of power consumption under the following
conditions.
Operating conditions internal core supply (Figure 7-1)
–V
VDDIN
= 3.0V
–V
VDDCORE
= 1.62V, supplied by the internal regulator
Corresponds to the 3.3V supply mode with 1.8V regulated I/O lines, please refer to
the Supply and Startup Considerations section for more details
•T
A = 25°C
Oscillators
OSC0 (crystal oscillator) stopped
OSC32K (32KHz crystal oscillator) running with external 32KHz crystal
DFLL running at 50MHz with OSC32K as reference
Clocks
DFLL used as main clock source
CPU, HSB, and PB clocks undivided
I/Os are inactive with internal pull-up
Flash enabled in high speed mode
POR33 disabled
Consumption active is the added current consumption when the module clock is turned on and
the module is doing a typical set of operations.
Amp0
VDDIN
VDDCORE
VDDANA
VDDIO