Datasheet

78
9166DS–AVR-01/12
AT32UC3C
TWIM and TWIS user interface registers. Please refer to the TWIM and TWIS sections for more
information.
Notes: 1. Standard mode: ; fast mode: .
2. A device must internally provide a hold time of at least 300 ns for TWD with reference to the falling edge of TWCK.
Notations:
C
b
= total capacitance of one bus line in pF
t
clkpb
= period of TWI peripheral bus clock
t
prescaled
= period of TWI internal prescaled clock (see chapters on TWIM and TWIS)
The maximum t
HD;DAT
has only to be met if the device does not stretch the LOW period (t
LOW-I2C
) of TWCK.
Table 7-50. TWI-Bus Timing Requirements
Symbol Parameter Mode
Minimum Maximum
UnitRequirement Device Requirement Device
t
r
TWCK and TWD rise time
Standard
(1)
- 1000
ns
Fast
(1)
20 + 0.1 C
b
300
t
f
TWCK and TWD fall time
Standard
(1)
-300
ns
Fast
(1)
20 + 0.1 C
b
300
t
HD-STA
(Repeated) START hold time
Standard
(1)
4.0
t
clkpb
- μs
Fast
(1)
0.6
t
SU-STA
(Repeated) START set-up time
Standard
(1)
4.7
t
clkpb
- μs
Fast
(1)
0.6
t
SU-STO
STOP set-up time
Standard
(1)
4.0
4t
clkpb
- μs
Fast
(1)
0.6
t
HD-DAT
Data hold time
Standard
(1)
0.3
(2)
2t
clkpb
3.45
?? μs
Fast
(1)
0.9
t
SU-DAT-I2C
Data set-up time
Standard
(1)
250
2t
clkpb
-ns
Fast
(1)
100
t
SU-DAT
--t
clkpb
--
t
LOW-I2C
TWCK LOW period
Standard
(1)
4.7
4t
clkpb
- μs
Fast
(1)
1.3
t
LOW
--t
clkpb
--
t
HIGH
TWCK HIGH period
Standard
(1)
4.0
8t
clkpb
- μs
Fast
(1)
0.6
f
TWCK
TWCK frequency
Standard
(1)
-
100
kHz
Fast
(1)
400
1
12t
clkpb
------------------------
f
TWCK
100 kHz≤
f
TWCK
100 kHz>