Datasheet

74
9166DS–AVR-01/12
AT32UC3C
Maximum SPI Frequency, Slave Input Mode
The maximum SPI slave input frequency is given by the following formula:
Where is the MOSI setup and hold time, USPI7 + USPI8 or USPI10 + USPI11 depending
on CPOL and NCPHA. is the maximum frequency of the CLK_SPI. Refer to the SPI
chapter for a description of this clock.
Maximum SPI Frequency, Slave Output Mode
The maximum SPI slave output frequency is given by the following formula:
Where is the MISO delay, USPI6 or USPI9 depending on CPOL and NCPHA. is
the SPI master setup time. Please refer to the SPI masterdatasheet for . is the
maximum frequency of the CLK_SPI. Refer to the SPI chapter for a description of this
clock. is the maximum frequency of the SPI pins. Please refer to the I/O Pin Characteris-
tics section for the maximum frequency of the pins.
7.9.4 SPI Timing
7.9.4.1 Master mode
Figure 7-11. SPI Master Mode With (CPOL= NCPHA= 0) or (CPOL= NCPHA= 1)
f
SPCKMAX
MIN
f
CLKSPI
2×
9
-----------------------------
1
SPIn
------------(,)=
SPIn
f
CLKSPI
f
SPCKMAX
MIN
f
CLKSPI
2×
9
-----------------------------
f
PINMAX
,
1
SPIn t
SETUP
+
------------------------------------(,)=
SPIn
T
SETUP
T
SETUP
f
CLKSPI
f
PINMAX
SPI0 SPI1
MISO
SPCK
MOSI
SPI2