Datasheet

72
9166DS–AVR-01/12
AT32UC3C
Maximum SPI Frequency, Master Output
The maximum SPI master output frequency is given by the following formula:
Where is the MOSI delay, USPI2 or USPI5 depending on CPOL and NCPHA. is
the maximum frequency of the SPI pins. Please refer to the I/O Pin Characteristics section for
the maximum frequency of the pins. is the maximum frequency of the CLK_SPI. Refer
to the SPI chapter for a description of this clock.
Maximum SPI Frequency, Master Input
The maximum SPI master input frequency is given by the following formula:
Where is the MISO setup and hold time, USPI0 + USPI1 or USPI3 + USPI4 depending
on CPOL and NCPHA. is the SPI slave response time. Please refer to the SPI slave
datasheet for . is the maximum frequency of the CLK_SPI. Refer to the SPI
chapter for a description of this clock.
7.9.3.2 Slave mode
Figure 7-8. USART in SPI Slave Mode With (CPOL= 0 and CPHA= 1) or (CPOL= 1 and
CPHA= 0)
f
SPCKMAX
MIN f
PINMAX
1
SPIn
------------
f
CLKSPI
2×
9
-----------------------------
,(, )=
SPIn
f
PINMAX
f
CLKSPI
f
SPCKMAX
MIN
1
SPIn t
VALID
+
----------------------------------- -
f
CLKSPI
2×
9
-----------------------------(,)=
SPIn
T
VALID
T
VALID
f
CLKSPI
USPI7 USPI8
MISO
SPCK
MOSI
USPI6